1. Field of the Invention
The present invention relates to the circuit configuration and layout of a pixel region in a liquid crystal display device provided with switching elements.
2. Description of the Related Art
In a conventional active matrix liquid crystal display device, a liquid crystal is enclosed between alignment layers provided on the individual inner surfaces of a pair of substrates, and a plurality of gate lines, a plurality of source lines, and thin-film transistors are formed on the opposing surface of one of the substrates. In order to increase the aperture ratio of an active matrix liquid crystal display device, a structure for suppressing disclination of the liquid crystal is conventionally used, in which sections that produce an electric field unnecessary to the liquid crystal, such as gate lines and source lines, are covered with transparent pixel electrodes.
The disclination is a phenomenon in which the alignment of a TN liquid crystal, which is a helical elastic body, is disordered in the presence of an electric field depending on the field intensity, the field direction, the helical direction, and the elastic constant. The disclination causes light leakage, and so on, resulting in a decrease in contrast ratio and degradation in display quality, such as residual images.
FIG. 8 is a plan view of a pixel region of a conventional active matrix liquid crystal device in which the aperture ratio is increased, and FIG. 9 is a sectional view taken along the line IXxe2x80x94IX of FIG. 8.
In the active matrix liquid crystal device, a plurality of gate lines 201 are arrayed in parallel on a glass substrate 210 and a plurality of source lines 202 are arrayed so as to be orthogonal to the gate lines 201 with a first insulating layer 208 therebetween. In the vicinity of each of the intersections of the gate lines 201 and the source lines 202, a thin-film transistor 211 composed of a semiconductor layer 203 composed of amorphous silicon or the like is disposed, and a drain electrode 204 thereof is connected to a transparent pixel electrode 206 through a contact hole 205 with a second insulating layer 209 therebetween.
In order to increase the aperture ratio, the transparent pixel electrode 206 is formed so as to overlap the gate lines 201 and the source lines 202, and thus the area of the transparent pixel electrode 206 is increased as much as possible, leakage of electric fields of the gate lines 201 and the source lines 202 is suppressed, and the occurrence of disclination is restricted within the gate line and source line regions. That is, the overlapping widths between the transparent pixel electrode 206 and the gate lines 201 and between the transparent pixel electrode 206 and the source lines 202 are designed so as to block the light leakage due to disclination.
In the structure described above in which the aperture ratio is increased, each overlapping portion of the transparent pixel electrode 206 with the gate line 201 or the source line 202 corresponds to parasitic capacitance. Although the dielectric constant of the second insulating layer 209 is decreased and the thickness of the second insulating layer 209 is increased, it has been known that the source lines 202 in which signals frequently vary are capacitively coupled to the transparent pixel electrode 206, resulting in crosstalk. In order to overcome this problem, the polarities of signals are reversed between the source lines 202 on both sides of the transparent pixel electrode 206, and thereby, the potential variation due to the capacitive coupling is offset. In order to obtain the offset effect, overlapping widths x1 and x2 of two adjacent transparent pixel electrodes 206 with the source line 202 are equalized.
Although disclination occurs at a different position depending on a liquid crystal molecular alignment direction, i.e., a rubbing direction 221 of a TFT substrate and a rubbing direction 222 of a counter substrate, in general, disclination occurs asymmetrically in two regions on either side of a source line. This is because of the fact that since an electric field curves like a bow above the source line, there is a deviation in disclination because the liquid crystal molecular alignment direction differs between a side in which the anchoring direction of liquid crystal molecules, which are anchored to the surface of the TFT substrate with a predetermined angle, and the electric field direction relatively agree with each other and a side in which they greatly differ. That is, in order to merely block the disclination, the aperture ratio can be further increased by setting the overlapping width x1 smaller than the overlapping width x2.
However, in the conventional structure, in view of offsetting the potential variation due to the capacitive coupling, the overlapping width x1 must be set equal to the overlapping width x2, and the overlapping width must be matched to the side in which the disclination is greater. The optically unused regions along the source lines, which are produced independent of the pixel size, cause a large decrease in the aperture ratio, in particular, in a high-resolution liquid crystal display device with a small pixel size.
Accordingly, it is an object of the present invention to provide a liquid crystal display device in which crosstalk is prevented from occurring and the aperture ratio is improved.
In accordance with the present invention, a liquid crystal display device includes a pair of substrates, a liquid crystal enclosed between alignment layers provided on the individual inner surfaces of the pair of substrates, a plurality of gate lines and a plurality of source lines intersecting each other arrayed in a matrix with a first insulating layer therebetween on the opposing surface of one of the substrates, switching elements, each connected to a gate electrode extending from one of the gate lines and to a source electrode extending from one of the source lines in the vicinity of each of the intersections between the gate lines and the source lines, and a transparent pixel electrode for driving the liquid crystal connected to each switching element through a drain electrode. A second insulating layer is disposed between the source lines and the transparent pixel electrodes, the transparent pixel electrodes adjacent to both sides of one of the source lines are formed so as to overlap the source line with different overlapping widths, and an auxiliary capacitor is formed to cancel a difference in the amount of parasitic capacitance generated due to the overlap of the individual transparent pixel electrodes with the source line.
The liquid crystal display device of the present invention is provided with the auxiliary capacitor for canceling the difference in parasitic capacitance generated due to the overlap of the transparent pixel electrodes with the source line with different overlapping widths in adjacent two pixel regions. That is, parasitic capacitance decreases in one of the adjacent pixel regions in which the overlapping width is smaller, and parasitic capacitance increases in the other pixel region in which the overlapping width is larger, and thus, by adding the auxiliary capacitance to the region having smaller parasitic capacitance, the adjacent pixel regions have the same sum of the parasitic capacitance and the auxiliary capacitance. Consequently, even if the overlapping width of the transparent pixel electrode with the source line differs between the adjacent pixel regions, the potential variation in the source line is satisfactorily offset, and crosstalk can be avoided. In other words, in the present invention, since crosstalk is prevented from occurring and the different overlapping widths of the transparent pixel electrodes with the source line are set, the transparent pixel electrodes and the source line are required to overlap merely by the widths for blocking the disclination occurring at the asymmetrical positions centering the source line, and the source line width can be decreased, resulting in an improvement in the aperture ratio.
Preferably, the auxiliary capacitor includes the source line as one electrode and an auxiliary electrode as the other electrode. The auxiliary electrode is disposed below the source line with the first insulating layer therebetween and is electrically connected to or capacitively coupled to the transparent pixel electrode or the drain electrode.
In such a case, the first insulating layer corresponds to a capacitor insulating layer constituting the auxiliary capacitor, and in general, the first insulating layer is very thin due to being the same layer as the gate insulating layer and has a large relative dielectric constant, and thereby large auxiliary capacitance can be obtained by a small overlapping area. Therefore, the aperture ratio can be further improved.
Preferably, the auxiliary capacitor includes an auxiliary electrode extending form the source line above the gate line as one electrode and the transparent pixel electrode extended thereon with the second insulating layer therebetween as the other electrode.
In such a configuration, it is not necessary to newly form an auxiliary electrode, and the pattern layout does not become complex, and thus the possibility of decreasing the yield is reduced.